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High Performance Reconfigurable Computing System Engineering Group
Dr Noor Mahammad Sk - Products
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    Software Products:

    1. Scalable and High Speed Multiplexer Design Algorithm

    2. Scalable and High Speed Decoder Design Algorithm

    System Products:

    1. DIDA: Digital Information for Diagnostics and Analytics as applied to Electrical and Electronics Circuits of Automobile Vehilces, Digi2o Pvt Ltd.,
    2. Received 13Th Rank in Swadesi Microprocessor Challange organized by MEITY, GoI.

    3. Design and Development of Non-Invasive Geo-physical Method based System for locating hidden septic tanks

    4. CIRCUIT+ - Automated Vehicle Circuit Analysis, Digi2o Pvt Ltd.,

    ASIC Designs:

    1. ASIC Chip Fabricated with Efabless - 19-high speed signed adder based on recursive doubling technique, fabricated at the SKY130nm technology node. Submitted in Oct 2021 and Expected in 2023. Area - 1027840 um 2 , Power - 2.8 mW, and Frequency - 83 MHz.

    2. ASIC Chip Fabricated with Efabless - 19-bit fixed to single precision floating point converter, fabricated at the SKY130nm technology node. Submitted in Oct 2021 and Expected in 2023. Area - 1027840 um 2 , Power - 3.2 mW, and Frequency - 242 MHz.

    3. ASIC Chip Fabricated with Efabless - 8-bit Approximate Multiplier design, fabricated at the SKY130nm technology node. Submitted in Oct 2021 and Expected in 2023.

    Hardware IPs - Verilog HDL:

    1. ASIC Chip - GDSII, Feature Extraction Engine with 8Khz Sampling Frequency implemented using SKY130nm technology node. Area - 312305 um 2 , Power - 2.2 mW, and Frequency - 3.1 MHz.

    2. ASIC Chip - GDSII, Feature Extraction Engine with 16Khz Sampling Frequency implemented using SKY130nm technology node. Area - 325910 um 2 , Power - 4.5 mW, and Frequency - 3.1 MHz.

    3. ASIC Chip - GDSII, Signed Adder (24-bit DSP Operator) implemented using SKY130nm technology node. Area - 10350 um 2 , Power - 2.9 mW, and Frequency - 83 MHz.

    4. ASIC Chip - GDSII, 24-bit Signed Prefix Adder implemented using SKY130nm technology node. Area - 1027840 um 2 , Power - 2.8 mW, and Frequency - 83 MHz.

    5. ASIC Chip - GDSII, 24-bit Carry Save Adder (DSP Operator) implemented using SKY130nm technology node. Area - 12368 um 2 , Power - 2.7 mW, and Frequency - 87 MHz.

    6. ASIC Chip - GDSII, 24-bit Carry Save Adder (Prefix Based) implemented using SKY130nm technology node. Area - 10292 um 2 , Power - 2.4 mW, and Frequency - 84 MHz.

    7. ASIC Chip - GDSII, 24-bit Dadda Multiplier implemented using SKY130nm technology node. Area - 19951 um 2 , Power - 3.5 mW, and Frequency - 56 MHz.

    8. ASIC Chip - GDSII, 16 - Point FFT (Single Precision Floating Point) implemented using SKY130nm technology node. Area - 23127 um 2 , Power - 1.9 mW, and Frequency - 24 MHz.

    9. ASIC Chip - GDSII, 32 - Point FFT (Single Precision Floating Point) implemented using SKY130nm technology node. Area - 32554 um 2 , Power - 3.3 mW, and Frequency - 24 MHz.

    10. ASIC Chip - GDSII, 256 - Point FFT (Single Precision Floating Point) implemented using SKY130nm technology node. Area - 2532761 um 2 , Power - 10.3 mW, and Frequency - 20 MHz.

    11. ASIC Chip - GDSII, 512 - Point FFT Twiddle Factor (Even Samples) Generator implemented using SKY130nm technology node. Area - 2941 um 2 , Power - 0.55 mW, and Frequency - 505MHz.

    12. ASIC Chip - GDSII, 512 - Point FFT Twiddle Factor (Odd Samples) Generator implemented using SKY130nm technology node. Area - 4374 um 2 , Power - 0.6 mW, and Frequency- 385 MHz.

    13. ASIC Chip - GDSII, 512 - Point FFT Twiddle Factor (Odd Samples) Generator implemented using SKY130nm technology node. Area - 4374 um 2 , Power - 0.6 mW, and Frequency- 385 MHz.

    14. ASIC Chip - GDSII, Single Precision Floating Point Adder (DSP Operator) implemented using SKY130nm technology node. Area - 22536 um 2 , Power - 1.8 mW, and Frequency - 38.6 MHz.

    15. ASIC Chip - GDSII, Single Precision Floating Point Adder (Prefix Adder) implemented using SKY130nm technology node. Area - 24384 um 2 , Power - 2.2 mW, and Frequency - 39 MHz.

    16. ASIC Chip - GDSII, Single Precision Floating Point Multiplier (DSP Operator) implemented using SKY130nm technology node. Area - 32172 um 2 , Power - 4.7 mW, and Frequency - 44.2 MHz.

    17. ASIC Chip - GDSII, Single Precision Floating Point Multiplier (Dadda Multiplier) implemented using SKY130nm technology node. Area - 35972 um 2 , Power - 5.1 mW, and Frequency - 45.2 MHz.

    18. ASIC Chip - GDSII, Single Precision Floating Point Square Root Unit implemented using SKY130nm technology node. Area - 48186 um 2 , Power - 0.13 mW, and Frequency - 7.5 MHz.

    19. ASIC Chip - GDSII, 19 bit Fixted point number to Single Precision Floating Converter implemented using SKY130nm technology node. Area - 2879 um 2 , Power - 0.56 mW, and Frequency - 243 MHz.

    20. ASIC Chip - GDSII, 19 bit Fixted point number to Single Precision Floating Converter implemented using SKY130nm technology node. Area - 2879 um 2 , Power - 0.6 mW, and Frequency - 243 MHz.

    21. ASIC Chip - GDSII, 8KHz Mel Cepstral Coefficient Selector (20 Mel Banks) implemented using SKY130nm technology node. Area - 5773 um 2 , Power - 1.2 mW, and Frequency - 698 MHz.

    22. ASIC Chip - GDSII, 16KHz Mel Cepstral Coefficient Selector (20 Mel Banks) implemented using SKY130nm technology node. Area - 6507 um 2 , Power - 1.4 mW, and Frequency - 212 MHz.

    23. ASIC Chip - GDSII, Mel Cepstral Coefficient Generator (20 Mel Banks) implemented using SKY130nm technology node. Area - 23127 um 2 , Power - 0.2 mW, and Frequency - 237 MHz.

    24. ASIC Chip - GDSII, Single Precision Floating Point Adder (DSP Operator) implemented using SKY130nm technology node. Area - 22536 um 2 , Power - 1.8 mW, and Frequency - 38.6 MHz.

    25. ASIC Chip - GDSII, Single Precision Floating Point Adder (Prefix Adder) implemented using SKY130nm technology node. Area - 24384 um 2 , Power - 2.2 mW, and Frequency - 39 MHz.

    26. ASIC Chip - GDSII, Single Precision Floating Point Multiplier (DSP Operator) implemented using SKY130nm technology node. Area - 32172 um 2 , Power - 4.7 mW, and Frequency - 44.2 MHz.

    27. ASIC Chip - GDSII, Single Precision Floating Point Multiplier (Dadda Multiplier) implemented using SKY130nm technology node. Area - 35972 um 2 , Power - 5.1 mW, and Frequency - 45.2 MHz.

    28. ASIC Chip - GDSII, Single Precision Floating Point Square Root Unit implemented using SKY130nm technology node. Area - 48186 um 2 , Power - 0.13 mW, and Frequency - 7.5 MHz.

    29. ASIC Chip - GDSII, 19 bit Fixted point number to Single Precision Floating Converter implemented using SKY130nm technology node. Area - 2879 um 2 , Power - 0.56 mW, and Frequency - 243 MHz.

    30. ASIC Chip - GDSII, 19 bit Fixted point number to Single Precision Floating Converter implemented using SKY130nm technology node. Area - 2879 um 2 , Power - 0.6 mW, and Frequency - 243 MHz.

    31. ASIC Chip - GDSII, 8KHz Mel Cepstral Coefficient Selector (20 Mel Banks) implemented using SKY130nm technology node. Area - 5773 um 2 , Power - 1.2 mW, and Frequency - 698 MHz.

    32. ASIC Chip - GDSII, 16KHz Mel Cepstral Coefficient Selector (20 Mel Banks) implemented using SKY130nm technology node. Area - 6507 um 2 , Power - 1.4 mW, and Frequency - 212 MHz.

    33. ASIC Chip - GDSII, Mel Cepstral Coefficient Generator (20 Mel Banks) implemented using SKY130nm technology node. Area - 23127 um 2 , Power - 0.2 mW, and Frequency - 237 MHz.

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