Educational Background:

PhD (2005-09)

Obtained PhD in Computer Science and Engineering from Indian Institute of Technology Madras (IIT Madras), Chennai. My PhD Advisor is Prof V Kamakoti. My PhD thesis title is Novel Fault Tolerant Reconfigurable Architectures.

M. Tech (2001-2003)

Obtained Master of Technology in Electronics Design and Technology, from Centre for Electronics Design and Technology of India (CEDTI), presently known as National Institute of Electronics and Information Technology (NIELIT), Auragabad. CEDTI Aurangabad is an autonomous Institute under Ministry of IT and Communications, Govt. of India.

B. Tech (1997-2001)

I have done my Bachelors of Technology in Electronics and Communication Engineering (ECE) at NBKR Institute of Science and Technology, Vidya Nagar, Nellore, Affliated to Sri Venkateswara University, Tirupati.

Professional Experience:

• Currently working as an Associate Professor in the department of Computer Science and Engineering at Indian Institute of Information Technology Design and Manufacturing (IIITDM) Kancheepuram, Chennai - 600127 [26 Apr 2022 to Till Date].

• Worked as an Assistant Professor in the department of Computer Science and Engineering at Indian Institute of Information Technology Design and Manufacturing (IIITDM) Kancheepuram, Chennai - 600127 [18 May 2011 to 25 Apr 2022].

• Worked as a Visiting Assistant Professor in Computer Engineering, at Indian Institute of Information Technology Design and Manufacturing (IIITDM), Kancheepuram, IIT Madras Campus, Chennai - 600 036 [07 June 2010 to 17 July 2011].

• Worked as a Professor in the department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, A. Rangampet Tirupati [21 May 2009 to 05 June 2010].

• Worked as a Teaching Assistant in the department of Computer Science and Engineering, Indian Institute of Technology Madras, Chennai - 600036, [03 Jan 2005 to 01 June 2008].

• Worked as an Assistant Professor in the department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, A. Rangampet, Tirupati [28 February 2003 to 14 December 2004].

Research Interests:

• High Performance Algorithms and Architectures for Packet Processing

• High Performance VLSI architectures for Digital Signal Processing

• Network System Design

• Reversible Circuit Design

• Software for VLSI Design

• Reconfigurable Computing

• Evolvable Hardware