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Dr Noor Mahammad Sk - Research Publications
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    Welcome to My Research Publications page!!


    International Journals Publications:

    1. Deepanjali S., Noor Mahammad Sk, Fault tolerant micro-programmed control unit for SEU and MBU mitigation in space based digital systems, Microelectronics Reliability, Volume 155, 2024, 115360, ISSN 0026-2714, https://doi.org/10.1016/j.microrel.2024.115360.

    2. Dhayalakumar M., Noor Mahammad Sk,TeRa: Ternary and Range based packet classification engine, Integration, Volume 96, 2024, 102153, ISSN 0167-9260, https://doi.org/10.1016/j.vlsi.2024.102153.[SCI Indexed]

    3. Deepanjali.S and Noor Mahammad.Sk. 2023. Scalable and Accelerated Self Healing Control Circuit using Evolvable Hardware. ACM Transactions on Design Automation Electronics Systems. Just Accepted (November 2023). https://doi.org/10.1145/3634682 [SCI Indexed]

    4. Deepanjali, S., Mahammad, S.K.N. A twofold bio-inspired system for mitigating SEUs in the controllers of digital system deployed on FPGA. Journal of Supercomputing (2023). https://doi.org/10.1007/s11227-023-05804-0 [SCI Indexed]

    5. Skandha Deepsita S., T. Karthikeyan, Noor Mahammad Sk., Energy efficient multiply-accumulate unit using novel recursive multiplication for error-tolerant applications, Integration, Volume 92, 2023, Pages 24-34, ISSN 0167-9260, https://doi.org/10.1016/j.vlsi.2023.04.006. [SCI Indexed]

    6. L Hemanth Krishna, Ayesha Sk, J Bhaskara Rao, Sreehari Veeramachaneni, and Noor Mahammad Sk, "Energy Efficient Approximate Multiplier Design with Lesser Error Rate using the Probability-based Approximate 4:2 Compressor"," in IEEE Embedded Systems Letters, doi: 10.1109/LES.2023.3280199, 2023. [SCI Indexed]

    7. Raghavendra Kumar Sakali, Sreehari Veeramachaneni, Noor Mahammad Sk, "Preferential fault-tolerance multiplier design to mitigate soft errors in FPGAs", Integration, Volume 93, 102068, ISSN 0167-9260, https://doi.org/10.1016/j.vlsi.2023.102068, 2023. [SCI Indexed]

    8. Kumar Sakali R, Noor Mahammad Sk, Intrinsic Based Self-healing Adder Design Using Chromosome Reconstruction Algorithm, Journal of Electronic Testing, 2023. https://doi.org/10.1007/s10836-023-06050-1 [SCI Indexed]

    9. Dhayalakumar M, Noor Mahammad Sk, Deterministic Approach for Range Enhanced Reconfigurable Packet Classification Engine, ACM Transactions on Reconfigurable Technology Systems,March 2023. https://doi.org/10.1145/3586577 [SCI Indexed]

    10. Skandha Deepsita S., Noor Mahammad Sk., Low power, high speed approximate multiplier for error resilient applications, Elsevier Integration, Vol. 84, Pages 37-46, (2022). [SCI Indexed]

    11. Skandha Deepsita S, Dhayala Kumar M, Noor Mahammad SK, "Energy Efficient Error Resilient Multiplier Using Low-power Compressors", ACM Transactions on Design Automation of Electronic SystemsVolume 27, Issue 3, May 2022, Article No.: 21, pp 1 - 26. [SCI Indexed]

    12. Deepanjali S, Sk Noor Mahammad, Self Healing Controllers to Mitigate SEU in the Control Path of FPGA Based System: A Complete Intrinsic Evolutionary Approach, Journal of Electron Test, vol. 38, pp. 547 - 565 (2022). https://doi.org/10.1007/s10836-022-06027-6. [SCI Indexed]

    13. Sai Srinivas Chandra, R Jagadeesh Kannan, B Saravana Balaji, Sreehari Veeramachaneni, Sk Noor Mahammad, Efficient design and analysis of secure CMOS logic through logic encryption, scientific reports, vol. 13, 1145, 2023.[SCI Indexed]

    14. Sakali Raghavendra Kumar, P Balasubramanian, Ramesh Reddy, Sreehari Veeramachaneni, Noor Mahammad Sk, Optimized Fault-Tolerant Adder Design Using Error Analysis, Journal of Circuits, Systems and Computers, 2022, https://doi.org/10.1142/S0218126623500913. [SCI Indexed]

    15. Chinthalgiri Jyothi, K Saranya, Bhaskara Rao Jammu, Sreehari Veeramachaneni, SK Noor Mahammad, A New Approximate 4-2 Compressor using Merged Sum and Carry, Journal of Electronic Test, vol. 38, pp. 381 - 394, 2022. [SCI Indexed]

    16. Jammu, Bhaskara Rao, Harsha L, Guna Sekhar Saia, Bodasingi Nalinib, Veeramachaneni Sreehari, SK Noor Mahammad, Hardware efficient circuit for low error logarithmic converter, Journal of Computational Methods in Sciences and Engineering, vol. 22, no. 2, pp. 511-527, 2022. [SCI Indexed]

    17. Harsha, Bhaskara Rao Jammu, Nalini Bodasingi, Sreehari Veeramachaneni, Noor Mohammad SK, A Low Error, Hardware Efficient Logarithmic Multiplier. Circuits Systems Signal Processing, vol. 41, pp. 485 - 513, 2022. https://doi.org/10.1007/s00034-021-01793-8 [SCI Indexed]

      18. During Assistant Professor

    18. L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Visveswara Rao Samoju, Sreehari Veeramachaneni, and Noor Mahammad Sk, "A low-error, memory-based fast binary antilogarithmic converter",International Journal of Circuit Theory and Applicationsthis link is disabled, 2021, 49(7), pp. 2214 - 2226. [SCI Indexed]

    19. Mounica, Y., Naresh Kumar, K., Sreehari Veeramachaneni, Sk Noor Mahammad, "Energy efficient signed and unsigned radix 16 booth multiplier design", Computers and Electrical Engineering, 2021, 90, 106892. [SCI Indexed]

    20. Hemanth, K.L., Neeharika, M., Janjirala, V., Veeramachaneni, S., Noor Mahammad, S, "Efficient design of 15:4 counter using a novel 5:3 counter for high-speed multiplication", IET Computers and Digital Techniquesthis link is disabled, 2021, 15(1), pp. 12 - 19. [SCI Indexed]

    21. Pavan Kalyan Kumar, M., Jammu, B.R., Veeramachaneni, S., Noor Mahammad Sk, "An Efficient and Optimized Converter for Fast Binary to Decimal Conversion", International Journal of Electronics Lettersthis link is disabled, 2021. [SCI Indexed]

    22. S M Srinivasavarma Vegesna, Shiv Vidhyut and Noor Mahammad S, "A TCAM based Caching Architecture Framework for Packet Classification", in ACM Transactions on Embedded Com puting System, Vol. 20, no. 1, 2020. [SCI Indexed]

    23. Chandana Mounica, Sagar Krishna, Sreehari Veeramachaneni and Noor Mahammad S, "Efficient implementation of mixedprecision multiply-accumulator unit for AI algorithms", March 2020, https://doi.org/10.1002/cta.2776. [SCI Indexed]

    24. M. Priyadharshni, Anishchandran Chathalingathu, S. Kumaravel, Arun Manoharan, Sreehari Veeramachaneni and Sk Noor Mahammad, "Logically Optimal Novel 4:2 Compressor Archi tectures for High-Performance Applications", Arabian Journal for Science and Engineering, April 2020. https://doi.org/10.1007/s13369-020-04503-9. [SCI Indexed]

    25. S. Veeramani and Sk. Noor Mahammad, "An Approach to Place Sink Node in a Wireless Sensor Network (WSN)", Wireless Personal Communications, pp 111, October 2019. [SCI Indexed]

    26. S. M. Srinivasavarma Vegesna, Ashok Chakravarthy Nara and Noor Mahammad Sk, "A Novel Rule Mapping on TCAM for Power Efficient Packet Classification", ACM Transactions on Design Automation of Electronic Systems (ACM TODAES), Vol. 24, no. 5, pp. 48:1-48:23, 2019. [SCI Indexed]

    27. Veeramani S and Noor Mahammad Sk, "Controller Load Balancing using Graph Theoretic Approach for OpenFlow Network", Caribbean Journal of Science, Vol. 53, no. 2, pp. 823-833, 2019. [SCI Indexed]

    28. S Veeramani and Noor Mahammad Sk, "A Heuristic Approach for the CCLP Problem in Software Defined Network (SDN)", Internetworking Indonesia Journal, Vol. 10, No. 1, pp. 3-8, 2018. [SCOPUS Indexed]

    29. Mohamed Asan Basiri M and Noor Mahammad Sk, "Discrete Orthogonal Multi-transform on Chip (DOMoC)" Journal of Signal Processing Systems, pp. 1-22, 22 Jan 2018. [SCI Indexed]

    30. Shanmugakumar Murugesan and Noor Mahammad Sk, "A Novel Range Matching Architecture for Packet Classification without Rule Expansion", ACM Transactions on Design Automation of Electronic Systems (ACM TODAES), Vol. 23, no. 1, pp. 8:1-8:15, September 2017. [SCI Indexed]

    31. Mohamed Asan Basiri M and Noor Mahammad Sk, "Quadruple Throughput Fixed Point Quarter Precision Multiply Accumulate Circuit", IET Computers and Digital Techniques, Vol. 11, no. 3, pp. 183-189, April 2017. [SCI Indexed]

    32. Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient VLSI Architecture for Lifting based 1D/2D Discrete Wavelet Transform", Microprocessors and Microsystems, Vol. 47, Part B, pp. 404-418, November 2016. [SCI Indexed]

    33. Mohamed Asan Basiri M and Noor Mahammad Sk, "High Speed Multiplexer Design using Tree based Decomposition Algorithm", Microelectronics Journal, Vol. 51, pp. 99-111, May 2016. [SCI Indexed]

    34. Mohamed Asan Basiri M and Noor Mahammad Sk, "Multi-mode Parallel and Folded VLSI Architectures for 1D-Fast Fourier Transform", Integration, the VLSI Journal, Vol. 55, pp. 43-56, September 2016. [SCI Indexed]

    35. Mohamed Asan Basiri M and Noor Mahammad Sk, "Configurable Folded IIR Filter Design", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 62, no. 12, pp. 1144-1148, December 2015. [SCI Indexed]

    36. Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient Hardware-Based Higher Radix Floating Point MAC Design", ACM Transactions on Design Automation of Electronic Systems, Vol. 20, No. 1, Article 15, November 2014. [SCI Indexed]

    37. S. Veeramani and Sk Noor Mahammad, "Efficient IP lookup using hybrid trie-based partitioning of TCAM-based open flow switches", Journal of Photonic Network Communications, Springer Publisher, Vol.28, no. 2, pp.135-145, October 2014. [SCI Indexed]

    38. P. Praveen Kumar and Sk. Noor Mahammad, "SDR based Multi Data Communication System Design", in Elsevier Procedia Engineering, Vol. 64, pp. 104-114, November 2013. [SCOPUS Indexed]

    39. Shanmuga Kumar M., Mohamed Asan Basiri M and Noor Mahammad Sk, "High Precision and High Speed Handheld Scientific Calculator Design Using Hardware based CORDIC Algorithm", in Elsevier Procedia Engineering, Vol. 64, pp. 56-64, November 2013. [SCOPUS Indexed]

      40. During PhD

    40. Mohammed Shoaib, Noor Mahammad Sk and V Kamakoti, "Hardware Based Genetic Evolution of Self-Adaptive Arbitrary Response FIR Filter", in International Journal of Applied Soft Computing, Vol.11, No. 1, pp. 842-854, January 2011. [SCI Indexed]

    41. Sk Noor Mahammad and V Kamakoti, "Constructing Online Testable Circuits using Reversible Logic", in IEEE Transactions on Instrumentation and Measurements, Vol. 59 No.1, pp. 101-109, January 2010. [SCI Indexed]


    International Conference Publications:

    1. S. Deepanjali, A. Shaik, S. Noor Mahammad and S. Beautlin, "Evolvable Hardware for Fault Mitigation in Control Circuits," 2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID), Kolkata, India, 2024, pp. 672-677, doi: 10.1109/VLSID60093.2024.00119.

    2. S. Raghavendra Kumar, S. Veeramachaneni and Sk Noor Mahammad, "Fault-Tolerant Floating-Point Multiplier Design for Mission Critical Systems," 2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID), Kolkata, India, 2024, pp. 678-683, doi: 10.1109/VLSID60093.2024.00120.

    3. Sakali Raghavendra Kumar, SK Noor Mahammad, P Balasubramanian, and G Venkat Reddy, "Novel Embryonics Adder Architecture with Unicellular Self-Check Unit", Proceedings of the Second International Conference on Emerging Trends in Engineering (ICETE 2023), pp. 928 - 935, Atlantis Press, doi.org/10.2991/978-94-6463-252-1_93, 2023.

    4. J Namratha Nadh, Ayesha Sk, Sreehari Veeramachaneni, Noor Mahammad Sk, "Energy Efficient Approximate Floating Point Divider", International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3), pp. 1-5, doi: 10.1109/IC2E357697.2023.10262554, 2023.

    5. V Mohith, Madhukumar Patnala, Sreehari Veeramachaneni, and Noor Mahammad Sk, "Precise Multiplier Design using Novel 4:2 Compressor", International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3), pp. 1-5, doi: 10.1109/IC2E357697.2023.10262475, 2023.

    6. Namratha, Ayesha Sk, Sreehari V, Noor Mahammad Sk, Energy Efficient Approximate Floating Point Divider, User Design Track, 36th International Conference on VLSI Design & 22nd International Conference on Embedded Systems, Jan 2023.

    7. Deepanjali S, Noor Mahammad, Balasubramanian P, G Venkat Reddy, Immunotronics inspired Novel Self Repairing Finite State Machine for RISC-V based Processor, National Conference on Systems Approach for Self-Reliance in Advanced Technologies (SASAT), March 2023.

    8. Veeramani Sonai, Indira Bharathi, and Sk Noor Mahammad, "A Perspective of IP Lookup Approach Using Graphical Processing Unit (GPU)". In Distributed Computing and Intelligent Technology: 19th International Conference, ICDCIT 2023, Bhubaneswar, India, January 18-22, 2023, Proceedings. Springer-Verlag, Berlin, Heidelberg, 98 - 103. https://doi.org/10.1007/978-3-031-24848-1_7, 2023.

    9. Kaniskaa MS, R Manimegalai, Noor Mahammad SK, "Parallelization Algorithm of Computer Vision for Autonomous Vehicles," 2023 2nd International Conference on Vision Towards Emerging Trends in Communication and Networking Technologies (ViTECoN), Vellore, India, 2023, pp. 1-6, doi: 10.1109/ViTECoN58111.2023.10157031, 2023.

    10. BS Chandrasekhar, S Deepanjali, Noor Mahammad Sk, Fault Tolerant Technique for Processor Control Path to Mitigate SEUs in FPGA, IEEE International Symposium on Smart Electronic Systems (iSES 2022), Warangal, India, 2022, pp. 31-35, doi: 10.1109/iSES54909.2022.00018.

    11. Sandeep Kolla, Ayesha Sk, S. Veeramachaneni, Noor Mahammad Sk, Logic Locking Designs at Transistor Level for Full Adders, IEEE International Symposium on Smart Electronic Systems (iSES), Warangal, India, 2022, pp. 289-292.

    12. L Hemanth Krishna, J Bhaskara Rao, Sk Ayesha, Sreehari Veeramachaneni, SK Noor Mahammad, Novel Approximate 4:2 Compressor for Multiplier Design, Advances in VLSI and Embedded Systems, Lecture Notes in Electrical Engineering, vol 962. Springer, Singapore.

      13. During Assistant Professor

    13. Sandeep Kolla, Ayesha Sk, Sreehari Veeramachaneni and Noor Mahammad Sk, "Design and Analysis of Obfuscated Full Adders", The 33rd IEEE International Conference on Microelectronics (ICM), 2021, pp.49-52, 19-22 Dec. 2021, Egypt, doi: 10.1109/ICM52667.2021.9664955.

    14. L Hemanth Krishna, Bhaskara Rao Jammu, Ayesha Sk, Sreehari Veeramachaneni and Noor Mahammad Sk, "Energy Efficient Approximate 4:2 Compressors for Error Tolerant Applications", 28Th IEEE International Conference on Electronics Circuits and Systems, Dec 2021, Dubai.

    15. L Hemanth Krishna, Bhaskara Rao Jammu, Ayesha Sk, Sreehari Veeramachaneni and Noor Mahammad Sk, "Novel Approximate 4:2 Compressor for Multiplier Design", in 2nd International Conference on Advances in VLSI and Embedded Systems (AVES 2021) during Dec. 18-19, 2021, MNIT Surat, India.

    16. L Hemanth Krishna, Bhaskara Rao Jammu, Ayesha Sk, Sreehari Veeramachaneni and Noor Mahammad Sk, "Energy Efficient Approximate Multiplier Design for Image/Video Processing Applications", 7Th IEEE International Symposium on Smart Electronic Systems (iSES-2021), 18-22 December 2021, NIT Jaipur.

    17. P Balasubramanian, P Balasubramanian and Noor Mahammad Sk, "A Novel Indigenous AI based Radiation Hardening Methodology to Develop Fault Tolerant Electronics for Aerospace and Defense Applications: Make in India Initiative", 5Th IETE Innovators - Industry Meet, New Delhi, 26-27 Aug 2021.

    18. S. Skandha Deepsita, K. Divya and S. Noor Mahammad, "Energy Efficient and Multiplierless Approximate Integer DCT Implementation for HEVC," 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021, pp. 1-6, doi: 10.1109/VLSI-SoC53125.2021.9606995.Singapore.

    19. M. Shanmugakumar, V. S. M. Srinivasavarma and S. Noor Mahammad, "Energy Efficient Hardware Architecture for Matrix Multiplication", IEEE 4th Conference on Information & Communication Technology (CICT), Chennai, India, 2020, pp. 1-6, doi: 10.1109/CICT51604.2020.9312050.

    20. S. Murugesan, M. Dhayalakumar and S. Noor Mahammad, "A Novel High Performance Universal Measurement Logic Element", IEEE 4th Conference on Information & Communication Technology (CICT), Chennai, India, 2020, pp. 1-6, doi: 10.1109/CICT51604.2020.9312059.

    21. Jyothi Chinthalgiri, K Gayathri, Veeramachaneni Sreehari, Noor Mahammad S, "Area Efficient Nearly Accurate Approximate Adder Design", IEEE India Council Subsections Confer ence (INDISCON) 2020, October 3 to 4, 2020.

    22. Jyothi Chinthalgiri, K Gayathri, Saranya K, Veeramachaneni Sreehari, Noor Mahammad S, "Area Efficient Approximate 4-2 Compressor for Multiplier Design", IEEE India Council Subsections Conference (INDISCON) 2020, October 3 to 4, 2020.

    23. S Skandha Deepsita and Noor Mahammad Sk, "Energy Efficient Binary Adders for Error Resilient Applications", IEEE International Conference on Modelling of System Circuits and Devices (MOS-AK India), 2019.

    24. R. Nirosha, S. D. Sarvepalli and Noor Mahammad Sk, "An Approximate Discrete Hadamard Transform for Energy Efficient Multimedia Processing", IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP), pp. 1-5, 2019.

    25. Santhosh Kumar S. R, Sreehari Veeramachaneni and Noor Mahammad Sk, "An Efficient DFT Implementation using Modified Group Distributed Arithmetic", 6th IEEE International Conference on Signal Processing and Integrated Networks (SPIN 2019), pp. 528-533, March 2019.

    26. Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient VLSI Architecture for Convolution Based DWT Using MAC", in the proceedings of the 31st International Conference on VLSI Design and 17Th International Conference on Embedded Systems (VLSID), pp. 271-276, January 2018.

    27. Mohamed Asan Basiri M and Noor Mahammad Sk, "High Performance Integer DCT Architectures for HEVC", in the proceedings of the 30Th International Conference on VLSI Design and 16Th International Conference on Embedded Systems (VLSID), pp. 121-126, January 2017.

    28. Chakshu Pahwa and Noor Mahammad Sk, "FPGA Implementation of 2D DHT in Image Processing", in the proceedings of the 4Th International Conference on Design and Manufacturing (IConDM), pp. 76-80, December 2016.

    29. Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient VLSI Architecture for Discrete Hadamard Transform", in the proceedings of the 29 th IEEE International Conference on VLSI Design and 15 th International Conference on Embedded Systems (VLSID), pp. 140-145, January 2016.

    30. Sai Hemanth, Gantasala and Noor Mahammad, Sk, "An Efficient Virtualization Server Infrastructure for e-Schools of India", in the Proceedings of 3 rd International Conference on Information Systems Design and Intelligent Applications (INDIA 2016), Volume 2, pp. 89-99, January 2016.

    31. Sai Charan, Addanki, Srinivasaverma, Vegesna S. M. and Noor Mahammad, Sk, "Lifeline System for Fisherman", Microelectronics, Electromagnetics and Telecommunications: Proceedings of ICMEET 2015, pp. 583-592, December 2015.

    32. S. Dinesh Kumar, and Noor Mahammad Sk, "A Novel Adiabatic SRAM Cell Implementation using Split Level Charge Recovery Logic", in the proceedings of 19 th IEEE International Symposium on VLSI Design and Test (VDAT), pp. 1-2, 2015.

    33. S. Dinesh Kumar and Sk Noor Mahammad, "A Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic", in the proceedings of 28 th IEEE International Conference on VLSI Design (VLSID), pp. 316-320, Bengalore, Jan. 2015.

    34. S. Dinesh Kumar and Sk. Noor Mahammad, "A Novel SRAM Cell Design Using Reversible Logic", in the proceedings of 3rd International Conference on Eco-friendly Computing and Communication Systems (ICECCS 2014), Surathkal, Dec 2014.

    35. S. Dinesh Kumar and Sk. Noor Mahammad, "A Novel Binary Content Addressable Memory Design using Reversible Logic", in the proceedings of the International Conference on Computing and Communication Technologies (ICCCT 2014), pp. 1-5, Hyderabad, Dec 2014.

    36. M. Mohamed Asan Basiri, and SK Noor Mahammad, "Memory Based Multiplier Design in Custom and FPGA Implementation", Advances in Intelligent Informatics (3rd International Symposium on Intelligent Informatics 2014), Springer International Publishing, pp. 253-265, New Delhi, 2015. [ISI, SCOPUS Indexed]

    37. Asan Basiri M., Samaresh Chandra Nayak, and Noor Mahammad Sk, "Multiplication Acceleration through Quarter Precision Wallace Tree Multiplier", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 502-505, New Delhi, February, 2014.

    38. Harshit Srivastava and Noor Mahammad Sk, "A novel Flexible Baseband Processor Architecture Framework", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 511-516, New Delhi, February, 2014.

    39. Asan Basiri M and Noor Mahammad Sk, "An efficient hardware based MAC design in digital filters with complex numbers", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 475-480, New Delhi, February, 2014.

    40. Sagarika Mohanty and Noor Mahammad Sk, "A novel Interleaver Design for Multimode Communication in WLAN", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 286-290, New Delhi, February, 2014.

    41. Veeramani S, Manas Kumar, and Sk Noor Mahammad, "Hybrid Trie based Partitioning of TCAM based Openflow Switches", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-5, Chennai, December 2013.

    42. Veeramani S, S Rahul Sharma and Sk Noor Mahammad, "Constructing scalable hierarchical switched openflow network using adaptive replacement of flow table management", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-3, Chennai, December 2013.

    43. Veeramani S, Biraja Nalini Rout, and Noor Mahammad Sk, "Novel Approach to Secure Channel using C-SCAN and microcontroller in Openflow", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-4, Chennai, December 2013.

    44. Veeramani S, Manas Kumar, and Sk Noor Mahammad, "Minimization of flow table for TCAM based Openflow Switches by Virtual Compression Approach", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-4, Chennai, December 2013.

    45. K Shravan Kumar, S A Srinivasa Moorthy, Noor Mahammad Sk, "Design of low cost programmable DC power supply unit", in the proceedings of International Conference on Control, Automation, Robotics and Embedded Systems (CARE 2013), pp.1-5, Jabalpur, Dec. 2013.

    46. Praveen Kumar P and Noor Mohammad Sk, "Reconfigurable baseband modulator for software defined radio", in the proceedings of IEEE International Conference on Information and Communication Technologies (ICT 2013), pp. 189-193, Nagarcoil, April 2013.

    47. Gangothri, T. Manasa, P. K. Sumitha, S. A. S. Moorthy, K. Selvajyothi, and Sk Noor Mahammad, "Design of compact controller and power module for corrosion and marine growth prevention", in the proceedings of 7th IEEE International Conference on Industrial and Information Systems (ICIIS), pp. 1-6, Chennai, August 2012.

      48. During PhD

    48. Karthik K S, Shyam S, Ramasubramanian N, Shoaib M, Noor Mahammad Sk and Kamakoti V, "A SEU Tolerant CLB RAM for In-Circuit Reconfiguration", in the proceedings of the 12 Th IEEE International VLSI Design and Test Symposium (VDAT' 08), pp. 228-238, Bangalore, India, July 2008.

    49. Mohammed Shoaib, Noor Mahammad Sk and Kamakoti V, "A Genetic Approach to Gateless Custom VLSI Design Flow", in the proceedings of 19Th IEEE International Conference on Microelctronics, pp XII-XVIII, Cairo, Egypt, December 2007.

    50. Hari Siva Kumar Sastry, Shyam Shroff, Noor Mahammad Sk and Kamakoti V, "Efficient Building Blocks for Reversible Sequential Circuit Design", in the proceedings of the 49Th IEEE International Midwest Symposium on Circuits and Systems, (MWSCAS' 06), pp 437-441, August 2006.

    51. Noor Mahammad Sk, Siva Kumar Sastry H, Shyam Shroff and Kamakoti V, "Constructing Online Testable Circuits using Reversible Logic", in the proceedings of 10Th IEEE International VLSI Design and Test Symposium (VDAT 2006), pp 373-383, Goa, India, August 2006.

    52. Noor Mahammad Sk, Chandrasekhar V, Muralidaran V, Kamakoti V and Vijaykrishnan N, "Reduced Triple Modular Redundancy for Tolerating SEUs in SRAM-based FPGAs", in the proceedings of the 8Th annual MAPLD International Conference on Programmable Logic Devices and Technologies, paper no. 204, Washington D.C., USA. September 2005. Organized by NASA, USA.
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