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FPGA based Non-Repudiation Image Watermarking System using Walsh-Hadamard Transform
M Dhayalakumar, & Noor Mahammad Sk

Sponsored by Ministry of Electronics and Information Technology, Govt. of India

  1. Objectives of the Research:

    2. The following are the major objectives of the work:

    • FPGA based Non repudiation Image or video encoding system using Walsh Hadamard Transform
    • The sensitive information of a image or video are encoded as QR code.
    • QR code information is embedded as invisible watermark using Walsh Hadamard Transform.

  2. Deliverables of the research:

    3. The following are the key deliverables of this research:

    1. Invisible Watermarking for live stream video using WHT.
    2. Verilog modelling of version 1 completed.
    3. Interfacing camera Module OV7670 with zedBoard. Frame size (640x480) RGB(4,4,4).
    4. First Stage Frame buffer to storage block of frame Module. Single Memory module with tandem controller.
    5. 8 point 2D Hardamard Transform Module for Row Processing.
    6. Second Stage Frame buffer to storage block of frame Module. Single Memory module with tandem controller.
    7. 8 point 2D Hardamard Transform Module for Column Processing.
    8. Version 3M QR Code Generator Hardware Module.
    9. Secure Watermarking Algorithm Module.
    10. 3rd Stage Frame Buffer to Store the Block after the watermarking.
    11. 8-point Inverse Hadamard Transform for row processing.
    12. 4th Stage Frame buffer to store the block.
    13. 8-point Inverse Hadamard Transform for Column processing.
    14. 640x480 BRAM memory to store entire frame.
    15. VGA Controller and Interface.
    16. Watermarking Algorithm for Image Demo.
    17. Watermarking Algorithm for live video Demo.

  3. Technical Specifications:

    4. Parameter Values
    Video Frame Color Depth/bits per pixel 12 bit
    Shutter Speed 1/60 Sec
    Frame per Sec 30
    Image (frame) Size 640 x 480
    QR Code Version 3M
    Size 29x29 Binary
    Design Environment HDL
    System 8-point 2D Hadamard Transform 64 pixel per block
    Buffer1 64 x 12-bit
    Buffer2 64 x 16-bit
    Buffer3 64 x 16-bit
    Buffer4 64 x 19-bit
    8-point 2D Inverse Hadamard Transform 64 pixel per block
    Memory BRAM 640x480 x 12-bits

  4. Overview of the Research Work:

  5. Detailed Implementation Details:


  6. Detailed Simulation Details:


  7. Demo Videos:
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